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ADC peripheral on Nordic devices

ADC stands for Analog-to-Digital Converter. An ADC is used to transform an analog signal, such as continuous analog voltage, into a digital format, enabling it to be read by a processor and enabling the processor to take actions based on the read values.

The ADC used on Nordic devices is of type Successive approximation (SA), hence the name Successive approximation analog-to-digital converter (SAADC). SAADCs are popular in microcontrollers and embedded systems due to their efficient design and low power consumption characteristics. They consist of a digital-to-analog converter (DAC), a successive approximation register (SAR), and a comparator. These together are called the SAR Core; in addition to the SAR Core, there is a sample and hold circuit and some other circuitry to interface the peripheral with the system. A SAADC converts a continuous analog waveform into a discrete digital representation using a binary search through all possible quantization levels before finally converging upon a digital acquisition time output for each conversion. The illustration below demonstrates how a basic 4-bit ADC works (source: Wikipedia)

The following paragraphs will cover core concepts related to the SAADC peripheral on Nordic hardware.

SAADC concepts

Sampling rate (frequency): The analog input signal is sampled at a defined interval known as the sampling interval, and the reciprocal of this interval is referred to as the sampling rate (sampling frequency). Sampling transforms a continuous-time signal into a discrete-time signal. The digital value is updated only at specific time intervals, and the recorded value essentially reflects historical data (even though it may only be 2μs old). Consequently, there is a potential to overlook brief events occurring between samples. Ensuring that the sampling interval is sufficiently short enough to capture abrupt changes in the analog input signal is imperative. According to the Nyquist–Shannon sampling theorem, the sampling rate must be at least twice the maximum frequency component of the sampled analog signal. The maximum sampling rate possible is affected by the conversion time (tconv) and acquisition time (tACQ ).

Maximum sampling frequency possible:

fSAMPLE < 1/(tACQ + tconv)

The SAADC peripheral in nRF52/nRF53/nRF91 Series chips supports a maximum sample rate of 200ksps, or 5us sampling interval. Future chip variants (Ex: nRF54) may support even faster sample rates.

Conversion time (tconv)

The time needed to convert a sample held in the internal sample and hold circuit into a digital value is the conversion time. The SAADC works by successively approximating the analog input to a digital value, and the conversion time is the time it takes to complete this process. The conversion time depends on the selected resolution (8/10/12-bit resolution).

A higher resolution leads to longer conversion times. A typical conversion time for the SAADC peripheral in nRF52/nRF53/nRF91 Series is 2 microseconds. Future chip variants (Ex: nRF54) may support even shorter conversion time.

Acquisition time (tACQ )

The acquisition time (~ 3-30 microseconds) impacts the sampling frequency, as discussed previously.

The sample and hold circuit inside SAADC captures the voltage of a continuously varying analog signal. It holds its value at a constant level for a specified minimum period of time. We can consider it, the time needed to connect the internal capacitor to the input analog signal. The time required to accurately capture”sample and hold” the input analog signal will depend on the source ”input” resistance, as shown below:


The resolution of the SAADC refers to the smallest distinguishable change in the input signal that the converter can detect and represent as a discrete digital value. It is typically expressed in bits, with higher bit resolutions allowing for finer and more accurate representations of the analog input.

8/10/12-bit resolution are supported on the nRF chips with the option of 14-bit resolution with oversampling. Oversampling improves the signal-to-noise ratio (SNR). Oversampling, however, does not improve the integral non-linearity (INL), or differential non-linearity (DNL).

Be aware that higher resolution will result in a longer conversion time, and lower resolution will result in a shorter conversion time.

Input mode

The SADDC peripheral supports both the Single-ended mode(SE) and differential mode(Diff).

Internally, the ADC is always a differential analog-to-digital converter. Still, by default, it is configured as single-ended mode(SE), and the negative input will be shorted to ground internally. In the single-ended mode, the assumption is that the internal ground of the ADC is the same as the external ground that the measured voltage is referred to.

This can be changed to differential mode(Diff) if desired. Using differential-ended will add some level of complexity to the interface circuit, but it will make the SADDC more resilient to ground bounce and noise.

The analog inputs can be configured as eight single-ended inputs, four differential inputs, or a combination of these. Each channel can be configured to select one of the following:

  • AIN0 to AIN7 pins
  • VDD pin
  • VDDHDIV5 (through VDDH pin/ if supported on the chip variant)

You could have channels selected as SE, and others selected as differential.


The following gains are supported on the SAADC in Nordic chips: 1/6, 1/5, 1/4, 1/3, 1/2, 1, 2, 4. The gain can be used to change the effective input range of the ADC, as explained next.

Reference Voltage

The SAADC can use the following two references:

  • Internal reference
  • VDD as reference

The internal reference results in an input range of ±0.6 V on the ADC core. VDD as reference results in an input range of ±VDD/4 on the ADC core. The gain block can be used to change the effective input range of the ADC.

Input range = (+- 0.6 V or +-VDD/4)/Gain

For example, choosing VDD as a reference, single-ended input (grounded negative input), and a gain of 1/4 the input range is the following:

Input range = (VDD/4)/(1/4) = VDD

With internal reference, single-ended input (grounded negative input), and a gain of 1/6, the input range is the following:

Input range = (0.6 V)/(1/6) = 3.6 V

The AIN0 – AIN7 inputs cannot exceed VDD

With this, we have covered the core features of the ADC inside a Nordic chip. In the following topics, we will learn how to use it.

Full documentation of the SAADC peripheral can be found in the Product specification of your SoC/SiP.

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