nRF54L Series Express

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RISC-V Coprocessor

To enable new functionality and support real-time requirements in applications, the nRF54L Series now includes a RISC-V CPU developed by Nordic Semiconductor, alongside the ARM Cortex-M33 application processor.

Although it is a separate RISC-V coprocessor, it does not operate independently; it must be activated by the main application core processor.

In the nRF54L SoC, the RISC-V is implemented as a Fast Lightweight Peripheral Processor (FLPR). It serves three key roles within the SoC:

  • It offloads the main core, functioning as an additional processor to boost the overall processing power. Due to its compact and efficient architecture, it is particularly effective in scenarios requiring time-sensitive access to peripherals.
  • It extends the nRF54L SoCs with peripherals that the chip is not equipped with by using pre-compiled SoftPeripherals.
  • It supports the High-Performance Framework (HPF), which facilitates the development of specialized or custom real-time protocols.

FLPR as an additional core

The FLPR (Fast Lightweight Peripheral Processor), an additional RISC-V coprocessor, can be utilized to offload tasks from the main CPU. It has access to peripherals and the DPPI system, enhancing system efficiency.

Additionally, programs for the FLPR can be stored either in SRAM or in non-volatile RRAM memory. For detailed instructions on how to effectively use the FLPR as an additional core, refer to the Working with the FLPR core page.

SoftPeripherals

SoftPeripherals are a collection of pre-compiled binaries and API driver code designed to emulate commonly used peripherals. These peripherals allow application code to use the API driver to load the pre-compiled binaries onto a specific RAM location, where they are executed by the FLPR. The peripheral code is highly optimized to reduce memory requirements to a minimum. In addition, the SoftPeripherals are protocol-compliant and verified by Nordic Semiconductor.

The list of available SoftPeripherals can be found in on the SoftPeripherals page.

High-Performance Framework & Real-time peripherals

The High-Performance Framework is a framework designed to support the design or modification of software-implemented protocols. It facilitates the use of hardware extensions (real-time peripherals) built into the FLPR:

  • VPR TIMER (VTIM) – Provides precise timing control and synchronization.
  • VPR IO (VIO) – A GPIO controller that can handle individually configured pins. The states of output pins can be buffered, allowing high-speed parallel GPIO updates.
  • VPR Event Interface (VEVIF) – is an event interface for VPR, allowing connection to the domain`s DPPI system. It can also generate IRQs to other CPUs (Application CPU in this case). The application CPU can also trigger IRQs on the FLPR using the VEVIF interface. 

Real-time peripherals remain active even in wait, sleep, and deep sleep modes. For more details, see the Real-time peripherals page.

As an example, we can look into the High-Performance Framework MSPI application.

More information about the RISC-V coprocessor can be found in our technical documentation – developing with coprocessors.

Note

In low-voltage SoC (nRF54LV10A), SoftPeripherals and Real-time peripherals have limited functionality. In this system, FLPR can be used as an additional core.

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